There is a growing interest in STT-MRAMs as replacements for embedded static random-access memories (SRAMs). An MRAM can be used for non-volatile storage of data in magnetic tunnel junctions (MTJs). An MTJ comprises a pinned layer and a free layer separated by a dielectric layer, wherein the relative magnetic orientation of the pinned layer and the free layer determines an electric resistance of the MTJ. The MTJ has a relatively low resistance when the magnetization of the pinned layer and the free layer are aligned in parallel and a relatively high resistance when the magnetization of the pinned layer and the free layer, respectively, are anti-parallel. The magnetization of the pinned layer may be fixed, whereas the direction of the magnetization of the free layer may be set by passing a relatively high current through the MTJ.
The tunnel magneto-resistance ratio (TMR) is a measure of the difference in resistance of the anti-parallel state and the parallel state. One drawback with existing MRAMs is their relatively low and varying TMR, which can make it difficult to tell the anti-parallel and parallel states apart during operation. One way of addressing this issue is to use a complementary cell with two MTJs in different states. Binary data may hence be stored in two different combinations of high- and low-resistance states.
Even though the complementary cell may improve readability of the MRAM bit cell, there may be a desire for a faster and more energy efficient MRAM bit cell having a reduced area.